74.5.1 Power-Up and Power-Down
At power-up, from a power supply sequencing perspective, the SAMA7G5 power
supply inputs are categorized into three independent groups:
- VDDIN33,
- the core group that contains VDDCPU and VDDCORE, and
- the periphery group that contains all other power supply inputs except VBAT.
The following figure shows the recommended power-up sequence. Note the
following:
- VBAT
- When supplied from a pre-charged storage element (battery or supercapacitor), VBAT is an always-on supply input and is therefore not part of the power supply sequencing.
- When no storage element is used on VBAT in the application, VBAT must be tied to VDDIN33.
- When a supercapacitor is used in the application to power VBAT during Backup mode, this element must be isolated from VBAT during its (slow) charge so that VBAT closely follows VDDIN33. In the table Power-Up Timing Specification, the parameter t0 limits the delay to establish VBAT after VDDIN33.
- VDDOUT25 is the output of the internal VDDOUT25 regulator, therefore, there is no power supply requirement on this pin. VDDOUT25 is mentioned in the following figures for information only. VDDOUT25 is automatically started at VDDIN33 rise when VDDIN33 is above its power-on reset threshold.
- VDDDPHY and VDDANA must be connected to VDDOUT25 and are therefore not subject to any supply sequencing requirement.
- NRST must be asserted low during the whole power-up sequence.
Symbol | Parameter | Conditions | Min | Max | Unit |
---|---|---|---|---|---|
t0 | VBAT delay | Delay from established VDDIN33 to established VBAT | – | 0.2 | ms |
t1 | VDDIN33 to periphery group delay | Delay from established VDDIN33 to the first established periphery group supply | -0.1 | – | ms |
t2 | Periphery group to VDDCORE delay | Delay from the last established periphery group supply to the first core group supply turn-on | 0 | – | ms |
t3 | Reset delay at power-up | Delay from the last established core group supply to NRST high | 8 | – | ms |
Note:
- The term "established" refers to a power supply established at 90% of its final value.
The following figure shows the SAMA7G5 power-down sequence that starts by
asserting the NRST line to 0. Once NRST is asserted, the supply inputs can be immediately
shut down without any specific timing or order. VBAT may not be shut down if the
application uses a backup storage element on this supply input. When VDDIN33 falls below
the negative-going threshold of the VDDIN33 power-on reset, the VDDOUT25 regulator is
automatically shut down and its output is pulled low by an internal discharge resistor.
Symbol | Parameter | Conditions | Min | Max | Unit |
---|---|---|---|---|---|
tRSTPD | NRST Delay at power-down | Delay from NRST low to the first supply out of its operating range | 0 | – | ms |