36.5.17 Register Write Protection

To prevent any single software error from corrupting PIO behavior, certain registers in the address space can be write-protected by setting WPEN and WPITEN in the PIO Write Protection Mode Register (PIO_WPMR) or the Secure PIO Write Protection Mode Register (S_PIO_WPMR).

If a write access to a Non-Secure write-protected register is detected, the WPVS flag in the PIO Write Protection Status Register (PIO_WPSR) is set and the field WPVSRC indicates the register in which the write access has been attempted.

If a write access to a Secure write-protected register is detected, the WPVS flag in the Secure PIO Write Protection Status Register (S_PIO_WPSR) is set and the field WPVSRC indicates the register in which the write access has been attempted.

The respective WPVS bit is automatically cleared after reading the PIO_WPSR or S_PIO_WPSR.

The following registers are write-protected when WPEN is set in PIO_WPMR:

• PIO Mask Register
• PIO Configuration Register

The following registers are write-protected when WPEN is set in S_PIO_WPMR:

• Secure PIO Mask Register
• Secure PIO Configuration Register
• Secure PIO Slow Clock Divider Debouncing Register

The following registers are write-protected when WPITEN is set in PIO_WPMR:

• PIO Interrupt Enable Register
• PIO Interrupt Disable Register

The following registers are write-protected when WPITEN is set in S_PIO_WPMR:

• Secure PIO Interrupt Enable Register
• Secure PIO Interrupt Disable Register