50.5.2 Limitations

The frequency ratio GCLK/peripheral clock must be lower than 4.

The frequency of the GCLK clock is determined by the maximum value of the input and output sampling frequencies.

When the sampling frequency is greater than 96 kHz (176.4 kHz, 192 kHz, for example), a ‘1’ must be written in ASRC_MR.GT96K and the maximum number of DSPs running in parallel is limited to 2. The GCLK frequency must be greater than or equal to 1024 × maximum sampling frequency. For example, for a sampling frequency of 192 kHz, GCLK ≥ 1024 × 192 kHz

If three or four DSPs are required, then ASRC_MR.GT96K must be cleared, the maximum sampling frequency is limited to 96 kHz and the GCLK frequency must be greater than or equal to 2048*maximum sampling frequency. For example, for a sampling frequency of 48 kHz, GCLK ≥ 2048 × 48 kHz.

If up to two DSPs are required and the sampling frequency is up to 96 kHz, writing a ‘1’ in ASRC_MR.GT96K=1 leads to a lower frequency on GCLK. For example, for a sampling frequency of 48 kHz, GCLK ≥ 1024 × 48 kHz.

When up-sampling, the maximum ratio between output and input sampling frequencies is 16. When down-sampling, the max ratio is 12.