13.11.8 MATRIX Host Error Interrupt Mask Register

Name: MATRIX_MEIMR
Offset: 0x0158
Reset: 0x00000000
Property: Read-only

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
  MERR14MERR13MERR12MERR11MERR10MERR9MERR8 
Access RRRRRRR 
Reset 0000000 
Bit 76543210 
 MERR7MERR6MERR5MERR4MERR3MERR2MERR1MERR0 
Access RRRRRRRR 
Reset 00000000 

Bits 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 – MERRx Host x Access Error

ValueDescription
0 Host x Access Error does not trigger any interrupt.
1 Host x Access Error triggers the MATRIX interrupt line.