74.9.1 Processor Power Consumption in Active Mode

The following table provides the processor power consumption in the following conditions:
  • fCPU_CLK = from 400 MHz to 1000 MHz
  • fMCK1 = 200 MHz
  • fMCK2 = 533 MHz
  • fMCK3 = 266 MHz
  • fMCK4 = 400 MHz
  • L1 caches enabled
  • L2 cache enabled
  • The Cortex-A7 core executes a CoreMark benchmark from the (internal) SRAM
  • Code compiled with speed optimization
  • Peripheral clocks disabled
  • Current measured according to the following figure
Figure 74-49. Current Measurement on VDDCORE and VDDCPU
Table 74-73. Processor Power Consumption running a Coremark Benchmark from SRAM on AMP1+AMP2
fCPU (MHz) VDDCPU (V) Current (mA) TJ (°C)
-40 25 50 70 85 105 125
400 1.1 IDDCORE 82 89 98 119 153 211 295
IDDCPU 57 66 76 101 140 208 312
600 1.1 IDDCORE 82 89 98 119 153 211 295
IDDCPU 90 99 109 134 173 241 362
800 1.15 IDDCORE 82 89 98 119 153 211 295
IDDCPU 131 141 153 181 227 306 459
1000 1.25 IDDCORE 82 89 98 119 153 211 –
IDDCPU 181 195 211 248 309 413 –
Figure 74-50. Typical Processor Power Consumption when Running a CoreMark Benchmark