7.4 SDIO Client Interface

The ATWILC3000A SDIO Client is a full-speed interface. This interface supports the 1-bit/4-bit SD Transfer mode at the clock range of 0-50 MHz. The Host can use this interface to read and write from any register within the chip, and configure the ATWILC3000A for DMA data transfer. To use this interface, pin 12 (SDIO_SPI_CFG) must be connected to ground. The following table provides mapping of the SDIO Client pins in the ATWILC3000A.

Table 7-4. SDIO Interface Pin Mapping
Pin #SPI Function
12CFG: Must be connected to ground
29CLK: Clock
30CMD: Command
31DAT0: Data 0
32DAT1: Data 1
34DAT2: Data 2
35DAT3: Data 3

When the SDIO card is inserted into an SDIO aware Host, the detection of the card is through the means described in the SDIO specification. During the normal initialization and interrogation of the card by the Host, the card identifies itself as an SDIO device. The Host software obtains the card information in a tuple (linked list) format and determines if that card’s I/O function(s) are acceptable to activate. If the card is acceptable, it is allowed to power up fully and start the I/O function(s) built into it.

The SD memory card communication is based on an advanced 9-pin interface (clock, command, four data lines and three power lines) designed to operate at a maximum operating frequency of 50 MHz.

Features

  • Supports SDIO card specification version 2.0
  • Host clock rate is variable, between 0 and 50 MHz
  • Supports 1-bit/4-bit SD Bus modes
  • Allows card to interrupt Host
  • Responds to direct read/write (IO52) and extended read/write (IO53) transactions
  • Supports suspend/resume operation