7.3 SPI Client Interface

The ATWILC3000A provides a Serial Peripheral Interface (SPI) that operates as an SPI Client. The SPI Client interface can be used for control and for serial I/O of IEEE 802.11 data. The SPI Client pins are mapped as shown in the following table. The RXD pin is the same as the Host Output, Client Input (MOSI) and the TXD pin is the same as the Host Input, Client Output (MISO). The SPI Client is a full-duplex, client-synchronous serial interface that is available immediately following Reset when pin 12 (SDIO_SPI_CFG) is connected to VDDIO.

When the SPI is not selected, that is, when SSN is high, the SPI interface will not interfere with data transfers between the serial host and other serial client devices. When the serial Client is not selected, its transmitted data output is buffered, resulting in a high-impedance drive onto the serial Host receive line.

The SPI Client interface responds to a protocol that allows an external Host to read or write any register in the chip and initiate DMA data transfers.

The SPI Client interface supports four standard modes as determined by the Clock Polarity (CPOL) and Clock Phase (CPHA) settings. These modes are illustrated in the following table.

The red lines in the following figure correspond to the Clock Phase at 0 and the blue lines correspond to the Clock Phase at 1.