28.4.2 Debug Operation

When the CPU is halted in debug mode the RAMECC will correct and log ECC errors based on the table below.

Table 28-1. ECC Debug Operation
DBGCTRL.ECCELOG DBGCTRL.ECCDIS Description
0 0 ECC errors from debugger reads are corrected but not logged in INTFLAG.
1 0 ECC errors from debugger reads are corrected and logged in INTFLAG.
X 1 ECC errors from debugger reads are not corrected or logged in INTFLAG.

If the RAMECC is configured in a way that requires it to be periodically serviced by the CPU through interrupts or similar, improper operation or data loss may result during debugging.