Reading these bits will return the contents of
the Receive Data register. The register should be read only when the Receive Complete
Interrupt Flag bit in the Interrupt Flag Status and Clear register (INTFLAG.RXC) is
set. The status bits in STATUS should be read before reading the DATA value in order
to get any corresponding error.
Writing these bits will write the Transmit
Data register. This register should be written only when the Data Register Empty
Interrupt Flag bit in the Interrupt Flag Status and Clear register (INTFLAG.DRE) is
set.
Reads and writes are 32-bit or CTLB.CHSIZE based on the CTRLC.DATA32B
setting.
