42.6.2.6.1 Position and Rotation Measurement
After filtering, the quadrature signals are analyzed to extract the rotation direction and edges in order to be counted by the counter.
The counter is split in two parts. The LSB part of the counter is used as Angular counter. The Phase A and B define the motor deplacement direction, which define the Angular and Revolution counting direction.
The Index can be enabled in two different ways:
- Set the PINEN[2] bit in the Control A register (CTRLA.PINEN[2]) if the Index is provided by the PIN2 IO pin directly.
- Set the EVEI[2] bit in Event Control register (EVCTRL.EVEI[2]) if the INDEX is provided by a channel connected to the Event System.
- If the signal polarity must be inverted, the user must program the PINVEN[2] in Control A register (CTRLA.PINVEN[2]) or EVINV[2] in Event Control register (EVCTRL.EVINV[2])
A valid Index is qualified with the two other inputs (PhaseA, PhaseB) at low level.
Each counter has a TOP value, defined as follows:
- If the Period is disabled (CTRLA.PEREN = 0), the TOP value for each counter represents the MAX value (all bit are one).
- If the Period is enabled (CTRLA.PEREN = 1), the Angular counter TOP value is the CC0 LSB portion, and the Revolution counter TOP value is the CC0 MSB portion. For additional information, refer to CTRLA.ANGULAR settings.
The "Signal 0" and "Signal 1" (refer to Figure 2-1 for details) edge detections define the motor axis position, which increments or decrements the Angular counter. The Angular counter will count up or down, depending on the counting direction. The counter is reloaded with its TOP or ZERO value depending on counting direction.
When the Index detection is disabled, the Angular counter is reloaded with its TOP or ZERO, depending on counter direction only, when the overflow (angular counter equals its TOP) or underflow (angular counter equals zero) conditions are met.
- When the counter is counting up and its TOP value is reached, the counter will be reloaded with ZERO value on the next tick (overflow) and the Overflow Interrupt Flag in the Interrupt Flag Status and Clear register (INTFLAG.OVF) will be set.
- When the counter is counting down and ZERO is reached, the counter will be reloaded with its TOP value on the next tick (underflow), and the INTFLAG.OVF will be set. The INTFLAG.OVF can be used to trigger an interrupt or an event.
When the Index is enabled, additional actions will occur, depending on the operating configuration (CTRLA.CONF):
- In X2 and X4 configuration operating
mode:
- When the counter is counting up, a valid Index detection will reload the counter with ZERO value
- When the counter is counting down, a valid Index detection will reload the counter with its TOP value
- In X2S and X4S configuration
operating mode:
- The first valid Index detection after the module is enabled, will reload the counter with ZERO value
- Any other valid Index detection which does not match the Angular counter overflow or underflow, will set the Index Error flag in the Status register (STATUS.IDXERR). The Error Interrupt Flag is set (INTFLAG.ERR) and an optional interrupt can be generated.
The Revolution counter will count up or down, depending on the counting direction and configuration modes:
- In X2 and X4 configuration operating
mode:
- If the Index is enabled, the counter is incremented (or decremented depending on counting direction) on each index detection.
- If the Index is disabled, the counter is incremented (or decremented depending on counting direction) on each Angular counter overflow/underflow
- In X2S and X4S configuration
operating mode, the counter is incremented (or decremented depending on counting
direction) on each Angular counter overflow/underflow
- If the Index is not detected after one Angular counter revolution, the Index Error flag in Status register (STATUS.IDXERR) is set. The Error Interrupt Flag is set (INTFLAG.ERR) and an optional interrupt can be generated.
When counting-up and its TOP value is reached, the Channel 0 Compare Match Interrupt Flag in the Interrupt Flag Status and Clear register (INTFLAG.MC0) will be set. When counting-down and ZERO is reached, the INTFLAG.MC0 will be set. The Channel 0 Compare Match condition can be enabled as source of interrupt or event generation.
