37.2 Features

The following are key features of the I2S module:

  • Compliant with Inter-IC Sound (I2S) bus specification
  • Supported data formats:
    • 32-bit, 24-bit, 20-bit, 18-bit, 16-bit, and 8-bit mono or stereo format
    • 16-bit and 8-bit compact stereo format, with left and right samples packed in the same word to reduce data transfers
  • Supported data frame formats:
    • 2-channel I2S with Word Select
    • 1- to 8-slot Time Division Multiplexed (TDM) with Frame Sync and individually enabled slots
    • 1- or 2-channel Pulse Density Modulation (PDM) reception for MEMS microphones
    • 1-channel burst transfer with non-periodic Frame Sync
  • 2 independent Clock Units handling either the same clock or separate clocks for the Serializers:
    • Suitable for a wide range of sample frequencies fs, including 32 kHz, 44.1 kHz, 48 kHz, 88.2 kHz, 96 kHz, and 192 kHz
    • 16×fs to 1024×fs Host Clock generated for external audio CODECs
  • Host, Client, and controller modes:
    • Host: Data received or transmitted based on internally-generated clocks. Output Serial Clock on the SCKn pin, Host Clock on the MCKn pin, and Frame Sync Clock on the FSn pin
    • Client: Data received or transmitted based on external clocks on Serial Clock pin (SCKn) or Host Clock pin (MCKn)
    • Controller: Only output internally generated Host clock (MCKn), Serial Clock (SCKn), and Frame Sync Clock (FSn)
  • Individual enabling and disabling of Clock Units and Serializers
  • DMA interfaces for each Serializer receiver or transmitter to reduce processor overhead:
    • Either one DMA channel for all data slots
    • One DMA channel per data channel in stereo
  • Smart Data Holding register management to avoid data slots mix after overrun or underrun