12.6.10 Peripheral Write Protection Status A
Writing to this register has no effect.
Reading STATUS register returns peripheral write protection status:
| Value | Description |
|---|---|
| 0 | Peripheral is not write protected. |
| 1 | Peripheral is write protected. |
| Name: | STATUSA |
| Offset: | 0x34 |
| Reset: | 0x00010000 |
| Property: | PAC Write-Protection |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| TC1 | TC0 | SERCOM1 | SERCOM0 | FREQM | EIC | RTC | WDT | ||
| Access | R | R | R | R | R | R | R | R | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| GCLK | SUPC | OSC32KCTRL | OSCCTRL | RSTC | MCLK | PM | PAC | ||
| Access | R | R | R | R | R | R | R | R | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 15 – TC1 TC1 APB Protect Enable
| Value | Description |
|---|---|
| 0 | TC1 is not write protected |
| 1 | TC1 is write protected |
Bit 14 – TC0 TC0 APB Protect Enable
| Value | Description |
|---|---|
| 0 | TC0 is not write protected |
| 1 | TC0 is write protected |
Bit 13 – SERCOM1 SERCOM1 APB Protect Enable
| Value | Description |
|---|---|
| 0 | SERCOM1 is not write protected |
| 1 | SERCOM1 is write protected |
Bit 12 – SERCOM0 SERCOM0 APB Protect Enable
| Value | Description |
|---|---|
| 0 | SERCOM0 is not write protected |
| 1 | SERCOM0 is write protected |
Bit 11 – FREQM FREQM APB Protect Enable
| Value | Description |
|---|---|
| 0 | FREQM is not write protected |
| 1 | FREQM is write protected |
Bit 10 – EIC EIC APB Protect Enable
| Value | Description |
|---|---|
| 0 | EIC is not write protected |
| 1 | EIC is write protected |
Bit 9 – RTC RTC APB Protect Enable
| Value | Description |
|---|---|
| 0 | RTC is not write protected |
| 1 | RTC is write protected |
Bit 8 – WDT WDT APB Protect Enable
| Value | Description |
|---|---|
| 0 | WDT is not write protected |
| 1 | WDT is write protected |
Bit 7 – GCLK GCLK APB Protect Enable
| Value | Description |
|---|---|
| 0 | GCLK is not write protected |
| 1 | GCLK is write protected |
Bit 6 – SUPC SUPC APB Protect Enable
| Value | Description |
|---|---|
| 0 | SUPC is not write protected |
| 1 | SUPC is write protected |
Bit 5 – OSC32KCTRL OSC32KCTRL APB Protect Enable
| Value | Description |
|---|---|
| 0 | OSC32KCTRL is not write protected |
| 1 | OSC32KCTRL is write protected |
Bit 4 – OSCCTRL OSCCTRL APB Protect Enable
| Value | Description |
|---|---|
| 0 | OSCCTRL is not write protected |
| 1 | OSCCTRL is write protected |
Bit 3 – RSTC RSTC APB Protect Enable
| Value | Description |
|---|---|
| 0 | RSTC is not write protected |
| 1 | RSTC is write protected |
Bit 2 – MCLK MCLK APB Protect Enable
| Value | Description |
|---|---|
| 0 | MCLK is not write protected |
| 1 | MCLK is write protected |
Bit 1 – PM PM APB Protect Enable
| Value | Description |
|---|---|
| 0 | PM is not write protected |
| 1 | PM is write protected |
Bit 0 – PAC PAC APB Protect Enable
| Value | Description |
|---|---|
| 0 | PAC is not write protected |
| 1 | PAC is write protected |