12.6.1 Write Control
| Name: | WRCTRL |
| Offset: | 0x00 |
| Reset: | 0x00000000 |
| Property: | – |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| KEY[7:0] | |||||||||
| Access | RW | RW | RW | RW | RW | RW | RW | RW | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| PERID[15:8] | |||||||||
| Access | RW | RW | RW | RW | RW | RW | RW | RW | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| PERID[7:0] | |||||||||
| Access | RW | RW | RW | RW | RW | RW | RW | RW | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 23:16 – KEY[7:0] Peripheral Access Control Key
These bits define the peripheral access control key:
| Value | Name | Description |
|---|---|---|
| 0x0 | OFF | No action |
| 0x1 | CLR | Clear the peripheral write control |
| 0x2 | SET | Set the peripheral write control |
| 0x3 | SETLCK | Set and lock the peripheral write control until the next hardware reset |
Bits 15:0 – PERID[15:0] Peripheral Identifier
The PERID represents the peripheral whose control is changed using the WRCTRL.KEY. The Peripheral Identifier is calculated following formula:
Where BridgeNumber represents the Peripheral Bridge Number (0
for Peripheral Bridge A, 1 for Peripheral Bridge B, etc). N represents the peripheral
index from the respective Bridge Number, which can be found in the tables of Section
12 Peripheral Configuration Summary in the "PAC, Index" column.
| Periph. Bridge Name | BridgeNumber | PERID Values |
|---|---|---|
| A | 0 | 0+N |
| B | 1 | 32+N |
| C | 2 | 64+N |
| D | 3 | 96+N |
Note:
- The following peripherals are not supported by the PAC:
- CAN0, CAN1
- GMAC
- ICM
- PCC
- SDHC0, SDHC1
- PORT read/write attempts on non-implemented registers, including addresses beyond the last implemented register group do not generate a PAC protection error.
- Writing the Frequency Meter Control B register (FREQM.CTRLB) will result in a PAC error.