8.4.2 SPI Client Mode

When operating in client mode, the SPI processes data bits on the clock provided on the SPI clock pin (SCK). The SPI waits until CS goes active before receiving the serial clock from an external host. When CS falls, the clock is validated and the data is loaded.

The bits are shifted out on the MISO line and sampled on the MOSI line.

When a transfer starts, the data shifted out is the data present in the internal Shift register. If no data has been written, the last data received is transferred. If no data has been received since the last reset, all bits are transmitted low, as the internal Shift register resets to 0.

When the first data is written, it is transferred immediately to the internal Shift register. If new data is written, it remains until a transfer occurs, i.e., CS falls and there is a valid clock on the SCK pin. When the transfer occurs, the last data written is transferred to the internal Shift register. This enables frequent updates of critical variables with single transfers.

If no character is ready to be transmitted, i.e., no character has been written since the last load to the internal Shift register, the last character is retransmitted.