34.2 Features

  • Up to four compare/capture channels (CC) with:
    • Double buffered period setting
    • Double buffered compare or capture channel
    • Circular buffer on period and compare channel registers
  • Waveform generation:
    • Frequency generation
    • Single-slope pulse-width modulation (PWM)
    • Dual-slope PWM with half-cycle reload capability
  • Input capture:
    • Event capture
    • Frequency capture
    • Pulse-width capture
  • Waveform extensions:
    • Configurable distribution of compare channels outputs across port pins
    • Low-side and high-side output with programmable dead-time insertion
    • Waveform swap option with double buffer support
    • Pattern generation with double buffer support
    • Dithering support
  • Fault protection for safe disabling of drivers:
    • Two recoverable fault sources
    • Two non-recoverable fault sources
    • Debugger can be a source of non-recoverable fault
  • Input events:
    • Two input events (EVx) for counter
    • One input event (MCx) for each channel
  • Output events:
    • Three output events (Count, Re-Trigger and Overflow) are available for counter
    • One Compare Match/Input Capture event output for each channel
  • Interrupts:
    • Overflow and Re-Trigger interrupt
    • Compare Match/Input Capture interrupt
    • Interrupt on fault detection
    • Counter cycle interrupt (INTFLAG.CNT)
    • Error condition interrupt (INTFLAG.ERR)
  • Can be used with DMA and can trigger DMA transactions
Table 34-1. TCC Configuration Summary
TCC# Channels (CC_NUM) Waveform Output (WO_NUM) Counter size Fault Dithering Output matrix Dead Time Insertion
 (DTI) SWAP Pattern generation
0 4 8 24-bit Yes Yes Yes Yes Yes Yes
1 2 4 16-bit Yes Yes Yes
2 2 2 16-bit Yes
Note: The number of CC registers (CC_NUM) for each TCC corresponds to the number of compare/capture channels, therefore a TCC can have more Waveform Outputs (WO_NUM) than CC registers.