37.6.8 Synchronization

Due to the asynchronicity between CLK_SDADC_APB and CLK_GEN_SDADC some registers must be synchronized when accessed. A register can require:

  • Synchronization when written
  • Synchronization when read
  • Synchronization when written and read
  • No synchronization

When executing an operation that requires synchronization, the corresponding synchronization bit is set in Synchronization Busy register (SYNCBUSY) and cleared when synchronization is complete.

If an operation that require synchronization is executed while its busy bit is on, the operation is discarded and a bus error is generated.

The following bits need synchronization when written:

  • Software Reset bit in Control A register (CTRLA.SWRST)
  • Enable bit in Control A register (CTRLA.ENABLE)

Write-synchronization is denoted by the Write-Synchronized property in the register description.

The following registers need synchronization when written:

  • Input Control register (INPUTCTRL)
  • Reference Control register (REFCTRL)
  • Control C register (CTRLC)
  • Window Monitor Lower Threshold register (WINLT)
  • Window Monitor Upper Threshold register (WINUT)
  • Offset correction register (OFFSETCORR)
  • Gain correction register (GAINCORR)
  • Shift correction register (SHIFTCORR)
  • Software Trigger register (SWTRIG)
  • Analog Control Register (ANACTRL)

Write-synchronization is denoted by the Write-Synchronized property in the register description.