17.4.4 Port B Input Pins Address

When addressing I/O registers as data space using LD and ST instructions, the provided offset must be used. When using the I/O specific commands IN and OUT, the offset is reduced by 0x20, resulting in an I/O address offset within 0x00 - 0x3F.

The device is a complex microcontroller with more peripheral units than can be supported within the 64 locations reserved in Opcode for the IN and OUT instructions. For the extended I/O space from 0x60 in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used.

Name: PINB
Offset: 0x23
Reset: N/A
Property: When addressing as I/O Register: address offset is 0x03

Bit 76543210 
 PINB7PINB6PINB5PINB4PINB3PINB2PINB1PINB0 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset xxxxxxxx 

Bits 0, 1, 2, 3, 4, 5, 6, 7 – PINB Port B Input Pins Address

Writing to the pin register provides toggle functionality for I/O. Refer to Toggling the Pin.