13.2 Sleep Modes

The following table shows the different sleep modes, BOD disable ability, and their wake-up sources.

Table 13-1. Active Clock Domains and Wake-Up Sources in the Different Sleep Modes
Sleep ModeActive Clock DomainsOscillatorsWake-Up SourcesSoftware
BOD Disable
clkCPUclkFLASHclkIOclkADCclkASYclkPTCMain Clock 
Source EnabledTimer Oscillator
 EnabledINT and PCINTTWI Address 
MatchTimer2SPM/EEPROM
ReadyADCWDTUSART(4)Other I/O
IdleYesYesYesYesYesYes(2)YesYesYesYesYesYesYesYes
ADC Noise
ReductionYesYesYesYesYes(2)Yes(3)YesYes(2)YesYesYesYes
Power-DownYes(3)YesYesYesYes
Power-SaveYesYesYes(5)Yes(2)Yes(3)YesYesYesYesYes
Standby(1)YesYes(3)YesYesYesYes
Extended StandbyYes(2)YesYesYes(2)Yes(3)YesYesYesYesYes
Note:
  1. Only recommended with external crystal or resonator selected as the clock source.
  2. If Timer/Counter2 is running in Asynchronous mode.
  3. For INT1 and INT0, only level interrupt.
  4. Start frame detection only.
  5. The main clock is kept running if PTC is enabled.

To enter any of the six sleep modes, the sleep enable bit in the Sleep Mode Control Register (SMCR.SE) must be written to '1' and a SLEEP instruction must be executed. Sleep Mode Select bits (SMCR.SM[2:0]) select which sleep mode (Idle, ADC Noise Reduction, Power-Down, Power-Save, Standby, or Extended Standby) will be activated by the SLEEP instruction.

Note: The block diagram in the section System Clock and Clock Options provides an overview over the different clock systems in the device and their distribution. This figure is helpful in selecting an appropriate Sleep mode.

If an enabled interrupt occurs while the MCU is in a Sleep mode, the MCU wakes up. The MCU is then halted for four cycles in addition to the start-up time, executes the interrupt routine, and resumes execution from the instruction following SLEEP. The contents of the register file and SRAM are unaltered when the device wakes up from sleep. If a reset occurs during Sleep mode, the MCU wakes up and executes from the Reset vector.