31.6 Boot Loader Lock Bits
If no boot loader capability is needed, the entire Flash is available for application code. The boot loader has two separate sets of boot lock bits which can be set independently. This gives the user a unique flexibility to select different levels of protection.
The user can select:
- To protect the entire Flash from a software update by the MCU
- To protect only the boot loader Flash section from a software update by the MCU
- To protect only the application Flash section from a software update by the MCU
- Allow software update in the entire Flash
The boot lock bits can be set in software and in Serial or Parallel Programming mode, but they can be cleared by a chip erase command only. The general Write Lock (Lock Bit mode 2) does not control the programming of the Flash memory by SPM instruction. Similarly, the general Read/Write Lock (Lock Bit mode 1) does not control reading nor writing by LPM/SPM, if it is attempted.
| BLB0 Mode | BLB02 | BLB01 | Protection |
|---|---|---|---|
| 1 | 1 | 1 | No restrictions for SPM or LPM accessing the application section. |
| 2 | 1 | 0 | SPM is not allowed to write to the application section. |
| 3 | 0 | 0 | SPM is not allowed to write to the application section, and LPM executing from the boot loader section is not allowed to read from the application section. If interrupt vectors are placed in the boot loader section, interrupts are disabled while executing from the application section. |
| 4 | 0 | 1 | LPM executing from the boot loader section is not allowed to read from the application section. If interrupt vectors are placed in the boot loader section, interrupts are disabled while executing from the application section. |
Note: “1” means unprogrammed, “0” means programmed.
| BLB1 Mode | BLB12 | BLB11 | Protection |
|---|---|---|---|
| 1 | 1 | 1 | No restrictions for SPM or LPM accessing the boot loader section. |
| 2 | 1 | 0 | SPM is not allowed to write to the boot loader section. |
| 3 | 0 | 0 | SPM is not allowed to write to the boot loader section, and LPM executing from the application section is not allowed to read from the boot loader section. If interrupt vectors are placed in the application section, interrupts are disabled while executing from the boot loader section. |
| 4 | 0 | 1 | LPM executing from the application section is not allowed to read from the boot loader section. If interrupt vectors are placed in the application section, interrupts are disabled while executing from the boot loader section. |
Note: “1” means unprogrammed, “0” means programmed.