14.4.1 Configuring the Pin
Each port pin consists of four register bits: DDxn, PORTxn, PUExn, and PINxn. As shown in the Register Description in this chapter, the DDxn bits are accessed at the DDRx I/O address, the PORTxn bits at the PORTx I/O address, and the PINxn bits at the PINx I/O address.
The DDxn bit in the DDRx Register selects the direction of this pin. If DDxn is written to '1', Pxn is configured as an output pin. If DDxn is written to '0', Pxn is configured as an input pin.
If PORTxn is written to '1' when the pin is configured as an input pin, the pull-up resistor is activated. To switch the pull-up resistor off, PORTxn has to be written to '0' or the pin has to be configured as an output pin. The port pins are tri-stated when reset condition becomes active, even if no clocks are running.
| DDxn | PORTxn | PUExn | I/O | Pull-up | Comment |
|---|---|---|---|---|---|
| 0 | x | 0 | Input | No | Tri-state (hi-Z) |
| 0 | x | 1 | Input | Yes | Sources current if pulled low externally |
| 1 | 0 | 0 | Output | No | Output low (sink) |
| 1 | 0 | 1 | Output | Yes | NOT RECOMMENDED. Output low (sink) and internal pull-up active. Sources current through the internal pull-up resistor and consumes power constantly |
| 1 | 1 | 0 | Output | No | Output high (source) |
| 1 | 1 | 1 | Output | Yes | Output high (source) and internal pull-up active |
Port pins are tri-stated when a reset condition becomes active, even when no clocks are running.