19.1 Description

The Bus Matrix (MATRIX) implements a multi-layer AHB, based on the AHB-Lite protocol, that enables parallel access paths between multiple AHB Hosts and Clients in a system, thus increasing the overall bandwidth. The MATRIX interconnects 13 AHB Hosts to 9 AHB Clients. The normal latency to connect a Host to a Client is one cycle. The exception is the default Host of the accessed Client which is connected directly (zero cycle latency).

The MATRIX user interface is compliant with ARM Advanced Peripheral Bus.