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PolarFire SoC FPGA DSP FIR Filter Demo Application Note AN5165
PolarFire SoC FPGA DSP FIR Filter Demo Application Note AN5165
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  2. 4 Running the Demo
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AN5165

  • Introduction
  • 1 Demo Requirements
  • 2 Demo Design Description
  • 3 Board Setup
  • 4 Running the Demo
    • 4.1 Installing and Starting the GUI
    • 4.2 Generating the Filter Coefficients and Input Signal
    • 4.3 Generating the Filter Output
  • 5 Appendix 1: Running the Tcl Script
  • 6 Appendix 2: References
  • 7 Revision History
  • Microchip FPGA Support
  • Microchip Information

4 Running the Demo

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Before you start, ensure that all the steps described in Board Setup are completed. Once the device is programmed, perform the following steps to run the demo:

  1. Installing and Starting the GUI
  2. Generating the Filter Coefficients and Input Signal
  3. Generating the Filter Output

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.

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