33.8.4 Sampling Time Control

Name: SAMPCTRL
Offset: 0x03
Reset: 0x00
Property: Write-Protected

Bit 76543210 
   SAMPLEN[5:0] 
Access R/WR/WR/WR/WR/WR/W 
Reset 000000 

Bits 5:0 – SAMPLEN[5:0] Sampling Time Length

These bits control the ADC sampling time in number of half CLK_ADC cycles, depending of the prescaler value, thus controlling the ADC input impedance. Sampling time is set according to the equation:

Sampling time = SAMPLEN + 1 CLK ADC 2