38.6.3.3 Inputs and Sample and Hold Acquisition Times

The analog voltage source must be able to charge the sample and hold (S/H) capacitor in the ADC in order to achieve maximum accuracy. Seen externally the ADC input consists of a resistor ( $R_{SAMPLE}$ $R_{SAMPLE}$ ) and a capacitor ( $C_{SAMPLE}$ $C_{SAMPLE}$ ). In addition, the source resistance ( $R_{SOURCE}$ $R_{SOURCE}$ ) must be taken into account when calculating the required sample and hold time. The figure below shows the ADC input channel equivalent circuit.

To achieve n bits of accuracy, the $C_{SAMPLE}$ $C_{SAMPLE}$ capacitor must be charged at least to a voltage of

{V_{CSAMPLE} \geq V}_{IN} \times (1 - 2^{- (n + 1)})

${V_{CSAMPLE} \geq V}_{IN} \times (1 - 2^{- (n + 1)})$

The minimum sampling time $t_{SAMPLEHOLD}$ $t_{SAMPLEHOLD}$ for a given $R_{SOURCE}$ $R_{SOURCE}$ can be found using this formula:

t_{SAMPLEHOLD} \geq ({R_{SAMPLE} + R}_{SOURCE}) \times (C_{SAMPLE}) \times (n + 1) \times ln (2)

$t_{SAMPLEHOLD} \geq ({R_{SAMPLE} + R}_{SOURCE}) \times (C_{SAMPLE}) \times (n + 1) \times \ln (2)$

for a 12 bits accuracy: $t_{SAMPLEHOLD} \geq ({R_{SAMPLE} + R}_{SOURCE}) \times (C_{SAMPLE}) \times 9.02$ $t_{SAMPLEHOLD} \geq ({R_{SAMPLE} + R}_{SOURCE}) \times (C_{SAMPLE}) \times 9.02$