32.8.13 Event User m

Table 32-15. Register Bit Attribute Legend
Symbol Description Symbol Description Symbol Description
R Readable bit HC Cleared by Hardware (Grey cell) Unimplemented
W Writable bit HS Set by Hardware X Bit is unknown at Reset
K Write to clear S Software settable bit — —
Name: USERm
Offset: 0x0120 + m*0x04 [m=0..31]
Reset: 0x00000000
Property: PAC Write-Protection

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
 CHANNEL[7:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bits 7:0 – CHANNEL[7:0] Channel Event Selection

These bits select channel n to connect to the event user m. The following table lists all of the Event Users and the associated 'm' value to determine which USERm register to define the desired Event Channel.

Note:
  1. A value x of this bit field selects channel n = x-1.
  2. By default, a channel is asynchronous. Channel synchronous/resynchronous path can be enabled if its index is < 12 and synchronous/resynchronous selection is written to CHANNEL.PATH bit field.
Table 32-16. Event User Mapping
User Macro User Multiplexor USER INDEX Description Path Type (1)
FREQM START 0 Start Measurement AR
RTC TAMPER 1 RTC Tamper A
PORT EVx 2-5 PORT Event x=0..3 ASR
DMA0 CHx-Start 6-13 Channel Start x=0..7 ASR
DMA0 CHx-Aux 14-21 Channel Aux x=0..7 ASR
DMA1 CHx-Start 22-25 Channel Start x=0..3 ASR
DMA1 CHx-Aux 26-29 Channel Aux x=0..3 ASR
TCC0 EVx 30,31 EV x=0..1 ASR
MCx 32-37 MC x=0..5 ASR
TCC1 EVx 38,39 EV x=0..1 ASR
MCx 40-45 MC x=0..5 ASR
TCC2 EVx 46,47 EV x=0..1 ASR
MCx 48-53 MC x=0..5 ASR
TCC3 EVx 54,55 EV x=0..1 ASR
MCx 56-61 MC x=0..5 ASR
TCC4 EVx 62,63 EV x=0..1 ASR
MCx 64,65 MC x=0..1 ASR
TCC5 EVx 66,67 EV x=0..1 ASR
MCx 68,69 MC x=0..1 ASR
TCC6 EVx 70,71 EV x=0..1 ASR
MCx 72,73 MC x=0..1 ASR
TCC7 EVx 74,75 EV x=0..1 ASR
MCx 76,77 MC x=0..1 ASR
ADC TRIGx 78-88 ADC TRIG x=0..10 ASR
AC SOCx 89,90 AC SOC x=0..1 ASR
PTC DSEQR 111 - A
STCONV 112 - A
CCL LUTIN_x 93-96 LUTx Input, x=0…3 ???
PDEC EVU_x 97-99 EVUx , x=0…2 ???
Note:
  1. A = Asynchronous path, S = Synchronous path, R = Resynchronized path