32.8 Register Summary

For descriptions and definitions of both Register and bitfield properties, refer to Register Properties.


Offset	Name	Bit Pos.	7	6	5	4	3	2	1	0
0x00	CTRLA	7:0								SWRST
0x01 ... 0x03	Reserved
0x04	SWEVT	7:0	CHANNEL7	CHANNEL6	CHANNEL5	CHANNEL4	CHANNEL3	CHANNEL2	CHANNEL1	CHANNEL0
		15:8	CHANNEL15	CHANNEL14	CHANNEL13	CHANNEL12	CHANNEL11	CHANNEL10	CHANNEL9	CHANNEL8
		23:16	CHANNEL23	CHANNEL22	CHANNEL21	CHANNEL20	CHANNEL19	CHANNEL18	CHANNEL17	CHANNEL16
		31:24	CHANNEL31	CHANNEL30	CHANNEL29	CHANNEL28	CHANNEL27	CHANNEL26	CHANNEL25	CHANNEL24
0x08	PRICTRL	7:0	RREN			PRI[4:0]
0x09 ... 0x0F	Reserved
0x10	INTPEND	7:0				ID[4:0]
0x10	INTPEND	15:8	BUSY	READY					EVD	OVR
0x12 ... 0x13	Reserved
0x14	INTSTATUS	7:0	CHINT7	CHINT6	CHINT5	CHINT4	CHINT3	CHINT2	CHINT1	CHINT0
		15:8	CHINT15	CHINT14	CHINT13	CHINT12	CHINT11	CHINT10	CHINT9	CHINT8
		23:16	CHINT23	CHINT22	CHINT21	CHINT20	CHINT19	CHINT18	CHINT17	CHINT16
		31:24	CHINT31	CHINT30	CHINT29	CHINT28	CHINT27	CHINT26	CHINT25	CHINT24
0x18	BUSYCH	7:0	BUSYCH7	BUSYCH6	BUSYCH5	BUSYCH4	BUSYCH3	BUSYCH2	BUSYCH1	BUSYCH0
		15:8	BUSYCH15	BUSYCH14	BUSYCH13	BUSYCH12	BUSYCH11	BUSYCH10	BUSYCH9	BUSYCH8
		23:16	BUSYCH23	BUSYCH22	BUSYCH21	BUSYCH20	BUSYCH19	BUSYCH18	BUSYCH17	BUSYCH16
		31:24	BUSYCH31	BUSYCH30	BUSYCH29	BUSYCH28	BUSYCH27	BUSYCH26	BUSYCH25	BUSYCH24
0x1C	READYUSR	7:0	READYUSR7	READYUSR6	READYUSR5	READYUSR4	READYUSR3	READYUSR2	READYUSR1	READYUSR0
		15:8	READYUSR15	READYUSR14	READYUSR13	READYUSR12	READYUSR11	READYUSR10	READYUSR9	READYUSR8
		23:16	READYUSR23	READYUSR22	READYUSR21	READYUSR20	READYUSR19	READYUSR18	READYUSR17	READYUSR16
		31:24	READYUSR31	READYUSR30	READYUSR29	READYUSR28	READYUSR27	READYUSR26	READYUSR25	READYUSR24
0x20	CHANNEL0	7:0	EVGEN[7:0]
		15:8	ONDEMAND	RUNSTDBY			EDGSEL[1:0]		PATH[1:0]
		23:16
		31:24
0x24	CHINTENCLR0	7:0							EVD	OVR
0x25	CHINTENSET0	7:0							EVD	OVR
0x26	CHINTFLAG0	7:0							EVD	OVR
0x27	CHSTATUS0	7:0							BUSYCH	RDYUSR
0x28	CHANNEL1	7:0	EVGEN[7:0]
		15:8	ONDEMAND	RUNSTDBY			EDGSEL[1:0]		PATH[1:0]
		23:16
		31:24
0x2C	CHINTENCLR1	7:0							EVD	OVR
0x2D	CHINTENSET1	7:0							EVD	OVR
0x2E	CHINTFLAG1	7:0							EVD	OVR
0x2F	CHSTATUS1	7:0							BUSYCH	RDYUSR
0x30	CHANNEL2	7:0	EVGEN[7:0]
		15:8	ONDEMAND	RUNSTDBY			EDGSEL[1:0]		PATH[1:0]
		23:16
		31:24
0x34	CHINTENCLR2	7:0							EVD	OVR
0x35	CHINTENSET2	7:0							EVD	OVR
0x36	CHINTFLAG2	7:0							EVD	OVR
0x37	CHSTATUS2	7:0							BUSYCH	RDYUSR
0x38	CHANNEL3	7:0	EVGEN[7:0]
		15:8	ONDEMAND	RUNSTDBY			EDGSEL[1:0]		PATH[1:0]
		23:16
		31:24
0x3C	CHINTENCLR3	7:0							EVD	OVR
0x3D	CHINTENSET3	7:0							EVD	OVR
0x3E	CHINTFLAG3	7:0							EVD	OVR
0x3F	CHSTATUS3	7:0							BUSYCH	RDYUSR
0x40	CHANNEL4	7:0	EVGEN[7:0]
		15:8	ONDEMAND	RUNSTDBY			EDGSEL[1:0]		PATH[1:0]
		23:16
		31:24
0x44	CHINTENCLR4	7:0							EVD	OVR
0x45	CHINTENSET4	7:0							EVD	OVR
0x46	CHINTFLAG4	7:0							EVD	OVR
0x47	CHSTATUS4	7:0							BUSYCH	RDYUSR
0x48	CHANNEL5	7:0	EVGEN[7:0]
		15:8	ONDEMAND	RUNSTDBY			EDGSEL[1:0]		PATH[1:0]
		23:16
		31:24
0x4C	CHINTENCLR5	7:0							EVD	OVR
0x4D	CHINTENSET5	7:0							EVD	OVR
0x4E	CHINTFLAG5	7:0							EVD	OVR
0x4F	CHSTATUS5	7:0							BUSYCH	RDYUSR
0x50	CHANNEL6	7:0	EVGEN[7:0]
		15:8	ONDEMAND	RUNSTDBY			EDGSEL[1:0]		PATH[1:0]
		23:16
		31:24
0x54	CHINTENCLR6	7:0							EVD	OVR
0x55	CHINTENSET6	7:0							EVD	OVR
0x56	CHINTFLAG6	7:0							EVD	OVR
0x57	CHSTATUS6	7:0							BUSYCH	RDYUSR
0x58	CHANNEL7	7:0	EVGEN[7:0]
		15:8	ONDEMAND	RUNSTDBY			EDGSEL[1:0]		PATH[1:0]
		23:16
		31:24
0x5C	CHINTENCLR7	7:0							EVD	OVR
0x5D	CHINTENSET7	7:0							EVD	OVR
0x5E	CHINTFLAG7	7:0							EVD	OVR
0x5F	CHSTATUS7	7:0							BUSYCH	RDYUSR
0x60 ... 0x011F	Reserved
0x0120	USER0	7:0	CHANNEL[7:0]
		15:8
		23:16
		31:24
...
0x019C	USER31	7:0	CHANNEL[7:0]
		15:8
		23:16
		31:24