31.5 Peripheral Dependencies
| Peripheral
Name |
Base Address | NVIC IRQ Index: Source | MCLK AHBx/APBx Clock Enable Mask Bit |
GCLK Peripheral Channel
Clock Name:Register |
PAC Peripheral Identifier
(PAC.WRCTRL.PERIDx) |
EVSYS Generator
(EVSYS.CHANNELn.EVGENx) |
Power Domain |
|---|---|---|---|---|---|---|---|
| ETH | 0x4502_2000 | 145 : Q_0 | AHB : MCLK.CLKMSK0[15] APB : MCLK.CLKMSK3[15] |
CLK_ETH_TX : GCLK.PCHCTRL[41]
CLK_ETH_TSU: GCLK.PCHCTRL[42] |
53 | 124: TSU_CMP | VDDCORE_SW |