22.6.1 Control A

Table 22-3. Register Bit Attribute Legend
Symbol Description Symbol Description Symbol Description
R Readable bit HC Cleared by Hardware (Grey cell) Unimplemented
W Writable bit HS Set by Hardware X Bit is unknown at Reset
K Write to clear S Software settable bit
Name: CTRLA
Offset: 0x00
Reset: x initially determined from USER CFG page after reset
Property: PAC Write-Protection, Write-Synchronized Bits, Enable-Protected Bits

Bit 76543210 
 ALWAYSONRUNSTDBY   WENENABLE  
Access R/W/CFGR/W/CFGR/W/CFGR/W/CFG 
Reset xxxx 

Bit 7 – ALWAYSON Always-On

This bit allows the WDT to run continuously. After being set, this bit cannot be written to '0', and the WDT will remain enabled until a Power-on Reset is received. When this bit is '1', the Control A register (CTRLA), the Configuration register (CONFIG) and the Early Warning Control register (EWCTRL) will be read-only, and any writes to these registers are not allowed.

Writing a '0' to this bit has no effect.

These bit is loaded from User Configuration FUCFG0 at startup.

Note: This bit is not enable-protected.
ValueDescription
0 The WDT is enabled and disabled through the ENABLE bit.
1 The WDT is enabled and can only be disabled by a power-on reset (POR).

Bit 6 – RUNSTDBY Run in Standby

This bit controls the behavior of the watchdog during Standby Sleep mode.

  • When CTRLA.ALWAYSON = 0, this bit is enable-protected by CTRLA.ENABLE.
  • When CTRLA.ALWAYSON = 1, this bit is not enable-protected by CTRLA.ENABLE.

These bit is loaded from User Configuration FUCFG0 at start up.

ValueDescription
0 The WDT is disabled during Standby sleep mode.
1 The WDT is enabled continues to operate during Standby sleep mode.

Bit 2 – WEN Watchdog Timer Window Mode Enable

This bit enables Window mode.

  • When CTRLA.ALWAYSON = 0, this bit is enable-protected by CTRLA.ENABLE.
  • When CTRLA.ALWAYSON = 1, this bit is not enable-protected by CTRLA.ENABLE.

These bit is loaded from User Configuration FUCFG0 at startup.

ValueDescription
0 Window mode is disabled (normal operation).
1 Window mode is enabled.

Bit 1 – ENABLE Enable

This bit enables or disables the WDT. It can only be written if CTRLA.ALWAYSON = 0.

These bit is loaded from User Configuration FUCFG0 at startup.

Note: This bit is write-synchronized: SYNCBUSY.ENABLE must be checked to ensure the CTRLA.ENABLE synchronization is complete.
Note: This bit is not enable-protected.
ValueDescription
0 The WDT is disabled.
1 The WDT is enabled.