27.5.4.5 Power Domain Controller

The Power Domain Controller provides several ways of how power domains are handled while the device is in Standby, Hibernate or Backup mode:

Standby mode:

When entering a Standby mode, the VDDCORE_RAM_PD power domain can be either fully or partially retained according to STDBYCFG.RAMCFG bits. When running a Sleepwalking task, VDDCORE_RAM_PD power domain is active whatever the STDBYCFG.RAMCFG is set to retain all RAM memory.

Dedicated power domain VDDCORE_USB_PD powered by the associated regulator can be ON or OFF according to the SUPC.VREGCTRL.AVREGSTDBY[0] and AVREGCFGEN[0] values.

Hibernate mode:

When entering a Hibernate mode, the VDDCORE_SW_PD power domain is off. As in Standby mode, the VDDCORE_RAM_PD power domain can be selectively turned ON or OFF by using HIBCFG.RAMCFG field.

Dedicated power domain (VDDCORE_USB_PD) is OFF.

Backup mode:

When entering Backup mode, the VDDCORE_SW_PD and VDDCORE_RAM_PD power domains are off, as well as the dedicated power domain (VDDCORE_USB_PD). VDDCORE_BU_PD is still active (powered by LPVREGC).

OFF mode:

When entering Off mode, all the power domains are off. I/Os are in high-impedance mode except the RESET_N pad which is still in input mode able to detect a reset to wake up the chip.