16.7.2.3 Debugger Probe Detection Conditions and Effects

The presence of a debugger probe is detected when either Hot-Plugging or Cold-Plugging is detected when STATUS.APDIS = 0, that is, when access ports are not disabled. When STATUSB.APDIS = 1, that is, when access ports are disabled:

• STATUSB.DBGPRES, STATUSB.HPE always read as ‘0’
• If CPUx is present, STATUSA.CRSTEXTx and STATUSA.BREXTx always read as ‘0’

Effects of a debugger detection are:

• PORT MUX JTAG or SWD functions are selected depending on the Debug Port (DP) selected protocol. These functions have a higher priority than the GPIO function controlled by the PORT module. User code cannot reclaim the pads that are claimed by the DP from that point on by configuring the PORT. The number of pads claimed by the DP depends on the DP selected protocol (JTAG or SWD). The DP starts in JTAG mode after a power-reset (TCK, TMS, TDI, TDO are claimed in this case) but can switch to SWD mode using the Arm JTAG to SWD switching sequence (the SWCLK and SWDIO pads only are claimed by the DP in this case).

• Access ports are enabled. Trying to access an access port register from the DP when it is disabled returns a DP fault (sets the DP sticky error bit).
• The Debugger Present bit of the Status B register (STATUSB.DBGPRES) reads one
• Extends the CPU reset (only with cold-plugging)