1.4.12 Simulation Model Enhancements
(Ask a Question)The Libero SoC 2025.1 release has the following updates and enhancements to PolarFire Simulation models and addresses a few bugs in simulations:
- LSRAM ECC error injection: The PF_TPSRAM configurator now supports ECC error injection during pre-synthesis simulation by setting a defined mask address, as described in the PolarFire Family Fabric User Guide.
- PF_IOD_GENERIC_RX: Simulation of L0_LP_DATA and L0_LP_DATA_N at high-speed data transition
- PF_IOD_TX_CCC: Updated 3.5 clock ratio
- Added post-layout simulation for I/O registers with SDF
- IOREG BA Simulation Support for inverted clocks with Neg edge register values