2.6 Page Erase

Figure 2-6 shows a high-level overview of erasing a page of code memory.

Table 2-5 provides the ICSP programming details for erasing a page of code memory.

Note: For Page Erase operations, the NVMCON value must be modified as per Table 2-2. The NVMADR/U registers must point to any of the locations on the page to be erased.
Figure 2-6. Page Erase Flow
Table 2-5. Serial Instruction Execution for Erasing a Page of Code Memory
Command (Binary)Data (Hex)Description

Step 1: Exit the Reset vector.

0000

0000

0000

0000

0000

0000

0000

000000

000000

000000

040200

000000

000000

000000

NOP

NOP

NOP

GOTO 0x200

NOP

NOP

NOP

Step 2: Set the NVMADRU/NVMADR register pair to point to the correct page to be erased.

0000

0000

0000

0000

2xxxx3

2xxxx4

884693

8846A4

MOV #DestinationAddress<15:0>, W3

MOV #DestinationAddress<23:16>, W4

MOV W3, NVMADR

MOV W4, NVMADRU

Step 3: Set the NVMCON register to erase the first page of executive memory.

0000

0000

0000

0000

24003A

88468A

000000

000000

MOV #0x4003, W10

MOV W10, NVMCON

NOP

NOP

Step 4: Initiate the erase cycle.

0000

0000

0000

0000

0000

0000

0000

0000

200551

8846B1

200AA1

8846B1

A8E8D1

000000

000000

000000

MOV #0x55, W1

MOV W1, NVMKEY

MOV #0xAA, W1

MOV W1, NVMKEY

BSET NVMCON, #WR

NOP

NOP

NOP

Step 5: Generate clock pulses for the Page Erase operation to complete until the WR bit is cleared.

0000

0000

0000

0000

0000

0001

0000

0000

0000

0000

0000

0000

0000

000000

804680

000000

887E60

000000

<VISI>

000000

000000

000000

040200

000000

000000

000000

NOP

MOV NVMCON, W0

NOP

MOV W0, VISI

NOP

Clock out contents of the VISI register.

NOP

NOP

NOP

GOTO 0x200

NOP

NOP

NOP

Repeat until the WR bit is clear.