2.4.1 Programming Operations

Flash memory write and erase operations are controlled by the NVMCON register. Programming is performed by setting NVMCON to select the type of erase operation (Table 2-2) or write operation (Table 2-3) and initiating the programming by setting the WR control bit (NVMCON[15]).

The PGECx clock is required to complete the programming operation. The WR control bit is cleared by hardware when the operation is finished. Refer to AC/DC Characteristics and Timing Requirements for detailed information about the maximum time required for various programming operations.

Table 2-2. NVMCON Erase Operations
NVMCON ValueErase Operation
0x400EBulk Erase of user memory only (does not erase Device ID, Programming Executive memory and OTP Words).
0x4003Page Erase of program or Programming Executive memory.
Table 2-3. NVMCON Write Operations
NVMCON ValueWrite Operation

0x4001

Double-Word Programming operation

0x4002

Row Programming operation