20.3.9 CAN Memories Address-based Register

Name:	SFR_CAN
Offset:	0x48
Reset:	0x00200020
Property:	Read/Write


Bit	31	30	29	28	27	26	25	24
	EXT_MEM_CAN1_ADDR[15:8]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	23	22	21	20	19	18	17	16
	EXT_MEM_CAN1_ADDR[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	1	0	0	0	0	0


Bit	15	14	13	12	11	10	9	8
	EXT_MEM_CAN0_ADDR[15:8]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	EXT_MEM_CAN0_ADDR[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	1	0	0	0	0	0

Bits 31:16 – EXT_MEM_CAN1_ADDR[15:0] MSB CAN1 DMA Base Address

Gives the 16-bit MSB of the CAN1 DMA base address. The 16-bit LSB must be programmed in the CAN1 user interface.

Bits 15:0 – EXT_MEM_CAN0_ADDR[15:0] MSB CAN0 DMA Base Address

Gives the 16-bit MSB of the CAN0 DMA base address. The 16-bit LSB must be programmed in the CAN0 user interface.