9.2.3 BOR Controlled by Software

When the BOREN bits of Configuration Words are programmed to ‘01’, the BOR is controlled by the SBOREN bit. The device start-up is not delayed by the BOR ready condition or the VDD level.

BOR protection begins as soon as the BOR circuit is ready. The status of the BOR circuit is reflected in the BORRDY bit.

BOR protection is unchanged by Sleep.

Table 9-1. BOR Operating Modes
BOREN[1:0]SBORENDevice ModeBOR ModeInstruction Execution upon:
Release of PORWake-up from Sleep
11XXActiveWait for release of BOR (BORRDY = 1)Begins immediately
10XAwakeActiveWait for release of BOR (BORRDY = 1)N/A
SleepHibernateN/AWait for release of BOR (BORRDY = 1)
011XActiveWait for release of BOR (BORRDY = 1)Begins immediately
0XHibernate
00XXDisabledBegins immediately
Note:
  1. In this specific case, “Release of POR” and “Wake-up from Sleep”, there is no delay in start-up. The BOR ready flag (BORRDY = 1) will be set before the CPU is ready to execute instructions because the BOR circuit is forced on by the BOREN[1:0] bits.
Figure 9-2. Brown-out Situations
Note: TPWRT delay only if the PWRTE bit is programmed to ‘0’.