20 TMR1 - Timer1 Module with Gate Control

Timer1 module is a 16-bit timer/counter with the following features:

  • 16-Bit Timer/Counter Register Pair (TMRxH:TMRxL)
  • Programmable Internal or External Clock Source
  • 2-Bit Prescaler
  • Optionally Synchronized Comparator Out
  • Multiple Timer1 Gate (Count Enable) Sources
  • Interrupt-on-Overflow
  • Wake-Up on Overflow (External Clock, Asynchronous Mode Only)
  • 16-Bit Read/Write Operation
  • Time Base for the Capture/Compare Function with the CCP Modules
  • Special Event Trigger (with CCP)
  • Selectable Gate Source Polarity
  • Gate Toggle Mode
  • Gate Single Pulse Mode
  • Gate Value Status
  • Gate Event Interrupt
Important: References to the Timer1 module apply to all the odd numbered timers on this device.
Figure 20-1. Timer1 Block Diagram
Note:
  1. This signal comes from the pin selected by TxCKIPPS.
  2. The TMRx register increments on rising edge.
  3. Synchronize does not operate while in Sleep.
  4. See the TMRxCLK register for clock source selections.
  5. See the TMRxGATE register for gate source selection.
  6. Synchronized comparator output must not be used in conjunction with synchronized input clock.