39.3.3 Power-Down Current (IPD)(1,2)

Table 39-3. 
Standard Operating Conditions (unless otherwise stated)
Param. No.Sym.Device CharacteristicsMin.Typ.†Max. +85°CMax. +125°CUnitsConditions
VDDVREGPMNote
D200IPDIPD Base——————b'11'Reserved

D200A

IPDIPD Base—0.64.012μA3.0Vb'10'
D200B—50—90μA3.0Vb'01'
D200C—170—280μA3.0Vb'00'
D201IPD_WDTLow-Frequency Internal Oscillator/WDT—0.95.013μA3.0Vb'10'
D202*IPD_SOSCSecondary Oscillator (SOSC)—1.64.310μA3.0Vb'10'SOSCPWR = 0
D203IPD_LPBORLow-Power Brown-out Reset (LPBOR)—0.95.013μA3.0Vb'10'
D204IPD_FVRFVR—70105110μA3.0Vb'10' or b'01'FVRCON = 0x81 or 0x84
D205IPD_BORBrown-out Reset (BOR)—306063μA3.0Vb'10'
D206IPD_HLVDHigh/Low Voltage Detect (HLVD)—22——μA3.0Vb'10'
D207IPD_ADCAADC - Active—330——μA3.0Vb'10' or b'01'ADC is converting (4)
D208IPD_CMPComparator—608590μA3.0Vb'10'

* These parameters are characterized but not tested.

† Data in “Typ.” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

Note:
  1. The peripheral current is the sum of the base IDD and the additional current consumed when this peripheral is enabled. The peripheral ∆ current can be determined by subtracting the base IDD or IPDcurrent from this limit. Max. values should be used when calculating total current consumption.
  2. The power-down current in Sleep mode does not depend on the oscillator type. Power-down current is measured with the part in Sleep mode with all I/O pins in high-impedance state and tied to VSS.
  3. All peripheral currents listed are on a per-peripheral basis if more than one instance of a peripheral is available.
  4. ADC clock source is FRC.