23.7.7 Interrupt Control Register - Split
Mode
| Name: | INTCTRL |
| Offset: | 0x0A |
| Reset: | 0x00 |
| Property: | - |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| | | LCMP2 | LCMP1 | LCMP0 | | | HUNF | LUNF | |
| Access | | R/W | R/W | R/W | | | R/W | R/W | |
| Reset | | 0 | 0 | 0 | | | 0 | 0 | |
Bit 6 – LCMP2 Low byte Compare
Channel 2 Interrupt Enable
Bit 5 – LCMP1 Low byte Compare
Channel 1 Interrupt Enable
Bit 4 – LCMP0 Low byte Compare
Channel 0 Interrupt Enable
Writing the LCMPn
bit to ‘1’ enables the low byte Compare Channel n
interrupt.
Bit 1 – HUNF High byte Underflow
Interrupt Enable
Writing the HUNF bit
to ‘1’ enables the high byte underflow
interrupt.
Bit 0 – LUNF Low byte Underflow
Interrupt Enable
Writing the LUNF bit
to ‘1’ enables the low byte underflow
interrupt.
