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27 TWI - Two-Wire Interface
27.5 Register Description

Introduction
Features
AVR® DU Family Overview
Security Concept
1 Block Diagram
2 Pinout
3 I/O Multiplexing and Considerations
4 Conventions
5 Hardware Guidelines
6 Power Supply
7 AVR® CPU
8 Memories
9 Peripherals and Architecture
10 GPR - General Purpose Registers
11 NVMCTRL - Nonvolatile Memory Controller
12 CLKCTRL - Clock Controller
13 SLPCTRL - Sleep Controller
14 RSTCTRL - Reset Controller
15 CPUINT - CPU Interrupt Controller
16 EVSYS - Event System
17 PORTMUX - Port Multiplexer
18 PORT - I/O Pin Configuration
19 BOD - Brown-out Detector
20 VREF - Voltage Reference
21 WDT - Watchdog Timer
22 RTC - Real-Time Counter
23 TCA - 16-bit Timer/Counter Type A
24 TCB - 16-Bit Timer/Counter Type B
25 USART - Universal Synchronous and Asynchronous Receiver and Transmitter
26 SPI - Serial Peripheral Interface
27 TWI - Two-Wire Interface
- 27.1 Features
- 27.2 Overview
- 27.3 Functional Description
- 27.4 Register Summary
- 27.5 Register Description
  - 27.5.1 Control A
    Control A
  - 27.5.2 Debug Control
    Debug Control
  - 27.5.3 Host Control A
    Host Control A
  - 27.5.4 Host Control B
    Host Control B
  - 27.5.5 Host Status
    Host Status
  - 27.5.6 Host Baud Rate
    Host Baud Rate
  - 27.5.7 Host Address
    Host Address
  - 27.5.8 Host Data
    Host Data
  - 27.5.9 Client Control A
    Client Control A
  - 27.5.10 Client Control B
    Client Control B
  - 27.5.11 Client Status
    Client Status
  - 27.5.12 Client Address
    Client Address
  - 27.5.13 Client Data
    Client Data
  - 27.5.14 Client Address Mask
    Client Address Mask
28 USB - Universal Serial Bus Device Controller
29 CRCSCAN - Cyclic Redundancy Check Memory Scan
30 CCL - Configurable Custom Logic
31 AC - Analog Comparator
32 ADC - Analog-to-Digital Converter
33 UPDI - Unified Program and Debug Interface
34 Instruction Set Summary
35 Ordering Information
36 Package Drawings
37 Electrical Characteristics
38 Characteristics Graphs
39 Data Sheet Revision History
Microchip Information