33.5.5 ASI Key Status
| Name: | ASI_KEY_STATUS |
| Offset: | 0x07 |
| Reset: | 0x00 |
| Property: | - |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| UROWWR | NVMPROG | CHER | |||||||
| Access | R/W | R | R | ||||||
| Reset | 0 | 0 | 0 |
Bit 5 – UROWWR User Row Write Key Status
1’ if the UROWWRITE key is successfully decoded. This bit must
be written as the final part of the user row write procedure to correctly reset the
programming session. Bit 4 – NVMPROG NVM Programming Key Status
1’ if the NVMPROG key is successfully decoded. The bit is
cleared when the NVM programming sequence is initiated, and the PROGSTART bit in
ASI_SYS_STATUS is set.Bit 3 – CHER Chip Erase Key Status
1’ if the Chip Erase key is successfully decoded. The bit is
cleared by the Reset Request issued as part of the chip erase sequence described in
the Chip Erase
section.