6 Memory Organization

To provide the greatest flexibility and backwards compatibility with the previous generations of SPD devices, the AT34C04 memory organization is organized into two independent 2-KBit memory arrays. Each 2-KBit (256-byte) section is internally organized into two independent quadrants of 128 bytes with each quadrant comprised of eight pages of 16 bytes. Including both memory sections, there are four 128-byte quadrants totaling 512 bytes.