3.1 IP Blocks
(Ask a Question)The following table lists the IP blocks used in the design and their functionality.
| IP Block | Description |
|---|---|
| PolarFire® Oscillator | The PolarFire RC Oscillator block generates a 2 MHz clock. |
| PolarFire Clock Conditioning Circuit (CCC) | The PolarFire CCC block generates multiple clocks required in the design. |
| PolaFire Clock Divider | The clock divider block performs a divide by operation. |
| H.264 Encoder | The H.264 block performs H.264 compression on YUV4:2:2 data input. |
| mipicsi2rxdecoder | The MIPI CSI-2 receiver decoder block
for PolarFire (MIPI CSI-2 Rx Decoder) decodes the data from the sensor
interface. Data Type: RAW-10 Lane Width: 4 Number of Pixels: 1 Inputs Data Invert: 0 FIFO depth: 12 |
| PolarFire IOD Generic RX | The IP block operates with 500 Mbps data rate |
| CoreReset | The IP block synchronizes the reset to the respective clock domain. |
| Microprocessor SubSystem (MSS) |
On the MSS hard IP, the Linux user space application receives the H.264 compressed frame from fabric FIFO and streams over Ethernet. For more information about the MSS configuration and LPRDDR4 memory partitioning, see MSS Configuration. |
| CoreAXI4Interconnect |
Configuring multiple IP's in the video pipeline is done through FIC0 Initiator interface in MSS. CoreAXI4Interconnect IP is used to re-direct these IP register configuration requests to the corresponding IP's using AXI4-Lite interface at the output interface. |
| Bayer Interpolation |
This IP block converts the 8-bit raw data to 24-bit RGB data |
| RGBtoYCbCr |
This color space conversion IP block converts RGB 24-bit data format to YUV422 16-bit data format. |
| Gamma Correction |
This IP block converts the pixel intensity to match with the perspective of human eye by using a logarithmic curve. |
| Image Enhancement |
This IP block adjusts the brightness, contrast, and color balance through user controls. |
| IMX334 |
This SmartDesign module receives the live camera feed and converts it into raw 8-bit parallel data. Each byte represents one pixel. |
| INIT MONITOR | The IP block triggers reset to the design. |
| Image Scaler | This IP scales down the input video to a resolution selected by user through web based graphical user interface. |
| MIPI Training Lite | This IP is used for clock data training for MIPI interface. |
| VDMA | Video DMA IP is used to write the frame data to the memory. |