3.3 Input and Output Ports
(Ask a Question)The following table lists the key input and output ports in the design.
| Port Name | Direction | Description |
|---|---|---|
| Camera RX, Reset, and Reference Clock Ports | ||
| CAM1_RST | Output | Input signal used to reset the camera sensor module. This signal comes from the MSS. |
|
CAM1_RX_CLK_P CAM1_RX_CLK_N | Input | Input pads to receive the reference clock for the camera sensor. |
|
CAM1_RXD[0] CAM1_RXD_N[0] CAM1_RXD[1] CAM1_RXD_N[1] CAM1_RXD[2] CAM1_RXD_N[2] CAM1_RXD[3] CAM1_RXD_N[3] | Input | Input pads to receive the live video from the camera sensor module. These pads are assigned to the Bank 7 I/Os. |
| MSS Peripheral Ports | ||
|
REFCLK REFCLK_N | Input | Input ports for receiving MSS reference clock from the on-board 125 MHz oscillator. |
| RESET_N | Output | This port is assigned to AB12 pin of Bank 6 MSS DDR. This port is used to reset the on-board LPDDR4. |
|
MMUART_0_RXD_F2M MMUART_0_TXD_M2F MMUART_1_RXD_F2M MMUART_1_TXD_M2F | Input and Output | Input and Output ports assigned to C7, B7, D4, and C4 pins. These pins are connected to the on-board CP2108 USB to UART chip. |
| USB_CLK | Input | USB clock from the on-board USB3340-EZK-TR IC. |
|
USB_DATA0 USB_DATA1 USB_DATA2 USB_DATA3 USB_DATA4 USB_DATA5 USB_DATA6 USB_DATA7 | Inout | USB data ports assigned to Bank 2 MSS I/Os. |
| EMMC_CLK | Output | This port is assigned to AA8 pin of the Bank 4 to provide clock to the eMMC device. |
| EMMC_CMD | Inout | This port is assigned to AA9 pin of Bank 4 to receive and forward eMMC commands. |
|
EMMC_DATA0 EMMC_DATA1 EMMC_DATA2 EMMC_DATA3 EMMC_DATA4 EMMC_DATA5 EMMC_DATA6 EMMC_DATA7 | Inout | eMMC data ports assigned to Bank 4 MSS I/Os. |
| SDIO_SW_EN_N | Output | Enable Secure Digital Input Output (SDIO) port. |
|
SDIO_SW_SEL0 SDIO_SW_SEL1 | Output | SDIO selection pin. |
|
SGMII_RX1_N SGMII_RX1_P | Input | Input ports assigned to Bank 5. These pins are connected to the on-board VSC8662 PHY device. |
|
SGMII_TX1_N SGMII_TX1_P | Output | Output ports assigned to Bank 5. These pins are connected to the on-board VSC8662 PHY device. |
| Transceiver Ports | ||
|
REF_CLK_PAD_N REF_CLK_PAD_P | Input | Input ports for receiving the transceiver reference clock from an on-board 148.5 MHz oscillator. |
|
LED2 LED3 | Output | GPIOs connected to on-board user LEDs. |