13.9.8.11 DPLL Control A
| Name: | DPLLCTRLA |
| Offset: | 0x28 |
| Reset: | 0x80 |
| Property: | PAC Write-Protection, Write-Synchronized (ENABLE) |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| ONDEMAND | RUNSTDBY | ENABLE | |||||||
| Access | R/W | R/W | R/W | ||||||
| Reset | 1 | 0 | 0 |
Bit 7 – ONDEMAND On Demand Clock Activation
The On Demand operation mode allows the DPLL to be enabled or disabled depending on peripheral clock requests.
If the ONDEMAND bit has been previously written to '1', the DPLL will only be running when requested by a peripheral. If there is no peripheral requesting the DPLL’s clock source, the DPLL will be in a disabled state.
If On Demand is disabled the DPLL will always be running when enabled.
In standby sleep mode, the On Demand operation is still active.
| Value | Description |
|---|---|
| 0 | The DPLL is always on, if enabled. |
| 1 | The DPLL is enabled when a peripheral is requesting the DPLL to be used as a clock source. The DPLL is disabled if no peripheral is requesting the clock source. |
Bit 6 – RUNSTDBY Run in Standby
This bit controls how the DPLL behaves during standby sleep mode:
| Value | Description |
|---|---|
| 0 | The DPLL is disabled in standby sleep mode if no peripheral requests the clock. |
| 1 | The DPLL is not stopped in standby sleep mode. If ONDEMAND=1, the DPLL will be running when a peripheral is requesting the clock. If ONDEMAND=0, the clock source will always be running in standby sleep mode. |
Bit 1 – ENABLE DPLL Enable
The software operation of enabling or disabling the DPLL takes a few clock cycles, so the DPLLSYNCBUSY.ENABLE status bit indicates when the DPLL is successfully enabled or disabled.
| Value | Description |
|---|---|
| 0 | The DPLL is disabled. |
| 1 | The DPLL is enabled. |