14.6.6.1 Overview

For time critical applications that want to start reading the frame data as early as possible, the Frame Buffer status can be indicated to the microcontroller through a dedicated pin. This pin indicates to the microcontroller if an access to the Frame Buffer is not possible since valid PSDU data are missing.

Pin 24 (IRQ) can be configured as a Frame Buffer Empty Indicator during a Frame Buffer read access. This mode is enabled by the RX_BL_CTRL bit in the TRX_CTRL_1 register (TRX_CTRL_1RX_BL_CTRL). The IRQ pin turns into Frame Buffer Empty Indicator after the Frame Buffer read access command, see note (1) below, has been transferred on the SPI bus until the Frame Buffer read procedure has finished indicated by /SEL = H, see note (4).

Figure 14-65. Timing Diagram of Frame Buffer Empty Indicator
Note:
  1. Timing figure t12 refer to the Digital Interface Timing Characteristics.
  2. A Frame Buffer read access can proceed as long as pin 24 (IRQ) = L.
  3. Pin IRQ = H indicates that the Frame Buffer is currently not ready for another SPI cycle.
  4. The Frame Buffer read procedure has finished indicated by /SEL = H.

The microcontroller has to observe the IRQ pin during the Frame Buffer read procedure. A Frame Buffer read access can proceed as long as pin 24 (IRQ) = L, see note (2). When the IRQ output pin is pulled high (IRQ = H) , the Frame Buffer is not ready for another SPI cycle, see note (3) above. The read operation can be resumed as the IRQ output pin is pulled low again (IRQ = L) to indicate new data in the buffer.

On Frame Buffer read access, three more byte are transferred via MISO after PHR and PSDU data, namely LQI, ED, and RX_STATUS. Because these bytes are appended and physically not stored in the frame buffer, they are ignored for Frame Buffer empty indication.

The Frame Buffer Empty Indicator pin 24 (IRQ) becomes valid after t12 = 750ns starting from the last SCLK rising edge while reading a Frame Buffer command byte, see figure above.

Upon completing the SPI frame data receive task, SPI read access can be disabled by pulling /SEL = H, note (4). At this time the IRQ output pin 24 (IRQ) ) can be used as an output to flag pending interrupts to the processor.

If during the Frame Buffer read access a receive error occurs (for example an PLL unlock), the Frame Buffer Empty Indicator locks on 'empty' (pin 24 (IRQ) = H) too. To prevent possible deadlocks, the microcontroller should impose a timeout counter that checks whether the Frame Buffer Empty Indicator remains logic high for more than two octet periods. A new byte must have been arrived at the frame buffer during that period. If not, the Frame Buffer read access should be aborted.