14.1.3.2 Frame Buffer Access Mode

Frame Buffer Access Mode is used to read and write AT86RF212B frame buffer. The frame buffer address is always reset to zero and incremented to access PSDU, LQI, ED and RX_STATUS data.

The Frame Buffer can hold up to 128-byte of one PHY service data unit (PSDU) IEEE 802.15.4 data frame. See related links for an introduction to the IEEE 802.15.4 frame format.

Each access starts with /SEL = L followed by a command byte on MOSI. Each frame read or write access command byte is followed by the PHR data byte, indicating the frame length, followed by the PSDU data.

In Frame Buffer Access Mode during buffer reads, the PHY header (PHR) and the PSDU data are transferred via MISO following PHY_STATUS byte. Once the PSDU data is uploaded, three more bytes are transferred containing the link quality indication (LQI) value, the energy detection (ED) value, and the status information (RX_STATUS) of the received frame. The figure below illustrates the packet structure of a Frame Buffer read access.

Note: The frame buffer read access can be terminated immediately at any time by setting pin 23 (/SEL) = H, for example after reading the PHR byte only.
Figure 14-7. Packet Structure - Frame Read Access

The structure of RX_STATUS is described in the table below.

Table 14-3. Structure of RX_STATUS
Bit 7 6 5 4
RX_CRC_VALID TRAC_STATUS RX_STATUS
Read/Write R R R R
Reset value 0 0 0 0
Bit 3 2 1 0
Reserved RX_STATUS
Read/Write R R R R
Reset value 0 0 0 0
Note: More information on RX_CRC_VALID, see the PHY_RSSI register, and on TRAC_STATUS, see the TRX_STATE register.

On frame buffer write access, the second byte transferred on MOSI contains the frame length (PHR field) followed by the payload data (PSDU).

Figure 14-8. Packet Structure - Frame Write Access

The number of bytes n for one frame buffer access is calculated as follows:

Read Access

n = 5 + frame_length

[PHY_STATUS, PHR byte, PSDU data, LQI, ED, and RX_STATUS]

Write Access

: n = 2 + frame_length

[command byte, PHR byte, and PSDU data]

The maximum value of frame_length is 127 bytes. That means that n ≤ 132 for Frame Buffer read and n ≤ 129 for Frame Buffer write accesses.

Each read or write of a data byte automatically increments the address counter of the Frame Buffer until the access is terminated by setting /SEL = H. A Frame Buffer read access can be terminated at any time without any consequences by setting /SEL = H, for example after reading the frame length byte only. A successive Frame Buffer read operation starts again with the PHR field.

The content of the AT86RF212B Frame Buffer is overwritten by a new received frame or a Frame Buffer write access.

The figures below illustrate an exemplary SPI sequence of a Frame Buffer access to read a frame with 2-byte PSDU and write a frame with 4-byte PSDU.

Figure 14-9. Exemplary SPI Sequence - Frame Buffer Read of a Frame with 2-byte PSDU
Figure 14-10. Exemplary SPI Sequence - Frame Buffer Write of a Frame with 4-byte PSDU

Access violations during a Frame Buffer read or write access are indicated by interrupt IRQ_6 (TRX_UR).

Note:
  1. The Frame Buffer is shared between RX and TX operations, the frame data is overwritten by freshly received data frames. If an existing TX payload data frame is to be retransmitted, it must be ensured that no TX data is overwritten by newly received RX data.
  2. To avoid overwriting during receive Dynamic Frame Buffer Protection can be enabled.
  3. For exceptions, receiving acknowledgement frames in Extended Operating Mode (TX_ARET).