15.5.9 Watchdog Interrupt Mask Register

The following configuration values are valid for all listed bit names of this register:

0: The corresponding interrupt is disabled.

1: The corresponding interrupt is enabled.

Name: WDT_IMR
Offset: 0x20
Reset: 0x00000000
Property: Read-only

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
      LVLINTRPTHINTPERINT 
Access RRR 
Reset 000 

Bit 2 – LVLINT Interrupt Level Threshold Interrupt Mask

Bit 1 – RPTHINT Repeat Threshold Interrupt Mask

Bit 0 – PERINT Period Interrupt Mask