15.5.8 Watchdog Interrupt Status Register
| Name: | WDT_ISR |
| Offset: | 0x1C |
| Reset: | 0x00000000 |
| Property: | Read-only |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| LVLINT | RPTHINT | PERINT | |||||||
| Access | R | R | R | ||||||
| Reset | 0 | 0 | 0 |
Bit 2 – LVLINT Interrupt Level Threshold Interrupt Status (cleared on read)
| Value | Description |
|---|---|
| 0 | No level threshold failure has occurred in the WDT since the last read of WDT_ISR. |
| 1 | At least one level threshold failure has occurred in the WDT since the last read of WDT_ISR. |
Bit 1 – RPTHINT Repeat Threshold Interrupt Status (cleared on read)
| Value | Description |
|---|---|
| 0 | No repeat threshold failure has occurred in the WDT since the last read of WDT_ISR. |
| 1 | At least one repeat threshold failure has occurred in the WDT since the last read of WDT_ISR. |
Bit 0 – PERINT Period Interrupt Status (cleared on read)
| Value | Description |
|---|---|
| 0 | No period failure has occurred in the WDT since the last read of WDT_ISR. |
| 1 | At least one period failure has occurred in the WDT since the last read of WDT_ISR. |