35.6 Register Summary

Note: The blocks of registers listed below are instanced 8 times in the user interface:
  • PMECC_ECCx[x=0..10]
  • PMECC_REMx[x=0..11]
OffsetNameBit Pos.76543210
0x00PMECC_CFG31:24        
23:16   AUTO   SPAREEN
15:8   NANDWR  PAGESIZE[1:0]
7:0   SECTORSZ BCH_ERR[2:0]
0x04PMECC_SAREA31:24        
23:16        
15:8       SPARESIZE[8]
7:0SPARESIZE[7:0]
0x08PMECC_SADDR31:24        
23:16        
15:8       STARTADDR[8]
7:0STARTADDR[7:0]
0x0CPMECC_EADDR31:24        
23:16        
15:8       ENDADDR[8]
7:0ENDADDR[7:0]
0x10PMECC_CLK31:24        
23:16        
15:8        
7:0     CLKCTRL[2:0]
0x14PMECC_CTRL31:24        
23:16        
15:8        
7:0  DISABLEENABLE USERDATARST
0x18PMECC_SR31:24        
23:16        
15:8        
7:0   ENABLE   BUSY
0x1CPMECC_IER31:24        
23:16        
15:8        
7:0       ERRIE
0x20PMECC_IDR31:24        
23:16        
15:8        
7:0       ERRID
0x24PMECC_IMR31:24        
23:16        
15:8        
7:0       ERRIM
0x28PMECC_ISR31:24        
23:16        
15:8        
7:0ERRIS[7:0]

0x2C

...

0x3F

Reserved         
0x40PMECC_ECC031:24ECC[31:24]
23:16ECC[23:16]
15:8ECC[15:8]
7:0ECC[7:0]
...        
0x68PMECC_ECC1031:24ECC[31:24]
23:16ECC[23:16]
15:8ECC[15:8]
7:0ECC[7:0]

0x6C

...

0x023F

Reserved         
0x0240PMECC_REM031:24  REM2NP3[13:8]
23:16REM2NP3[7:0]
15:8  REM2NP1[13:8]
7:0REM2NP1[7:0]
...        
0x026CPMECC_REM1131:24  REM2NP3[13:8]
23:16REM2NP3[7:0]
15:8  REM2NP1[13:8]
7:0REM2NP1[7:0]