35.6.7 PMECC Status Register

Name: PMECC_SR
Offset: 0x018
Reset: 0x00000000
Property: Read-only

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
    ENABLE   BUSY 
Access RR 
Reset 00 

Bit 4 – ENABLE PMECC Module Status

ValueDescription
0

The PMECC module is disabled and can be configured.

1

The PMECC module is enabled and the configuration registers cannot be written.

Bit 0 – BUSY Kernel of the PMECC is Busy